Navneet

PhD student, School of Computer Science, Georgia Tech

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Hey! I am a third-year PhD student in Computer Science at Georgia Tech. My research sits at the intersection of machine learning systems and computer architecture, with a focus on algorithm–system co-design for accelerating LLM and diffusion-model inference on GPUs. I am currently working with Prof. Celine Lin on hierarchical-sparsity techniques and custom CUDA kernels to speed up block-diffusion model inference.

Along the way I have worked on GPU kernel scheduling at AMD, ML-based performance modeling for distributed-training simulators with Prof. Tushar Krishna, secure cache design with Prof. Moinuddin K. Qureshi, and side-channel reverse-engineering of ARM CPUs with Prof. Daniel Genkin. I completed my undergraduate in Electrical Engineering at the Indian Institute of Technology, Bombay, where my research on storage-efficient, secure last-level caches led to the Maya Cache (ISCA ‘24).

Besides research, I indulge myself in various sports activities. Table tennis, football, and badminton are among my favorites along with inline skating.

If you are looking for my CV, click here

news

Jan 15, 2026 Started working with Prof. Celine Lin on HiDeS — accelerating block-diffusion LLM inference through hierarchical delta sparsity and custom CUDA kernels.
Aug 1, 2025 Joined AMD as a PhD Research Associate, working on concurrent GPU kernel execution and fine-grained dispatch strategies for LLM inference in vLLM.
Mar 16, 2024 My work, “The Maya Cache: A Storage-efficient and Secure Fully-associative Last-level Cache”, got accepted at the International Symposium on Computer Architecture (ISCA) 2024.